1. Field of the Invention
The present invention relates to a signal processing system, and in particular, to a signal processing system having a voice processing function such as, for example, a voice recognition function or a voice synthesis function, which is required to be performed in real-time in mobile electronic devices including cellular phones.
2. Description of the Related Art
FIG. 6 is a block diagram illustrating a conventional voice processing system 600.
The voice processing system 600 includes a CODEC 601, a DSP (digital signal processor) 602, non-volatile MROMs (mask ROMs) 603 and 606, a synchronous DRAM 604, and a microprocessor (CPU) 605. The DSP 602 is connected to the non-volatile MROM 606, the synchronous DRAM 604, and the microprocessor 605 via a bus 607.
The CODEC 601 includes an A/D converter for converting an analog voice signal input from an external device into a digital signal, and a D/A converter for converting a digital signal obtained by processing performed in the voice processing system 600 into an analog signal. The DSP 602 processes the digital signal obtained by the A/D converter in the CODEC 601. The non-volatile MROM 603 stores an acoustic model used for extracting a feature amount of the input analog voice signal. The non-volatile MROM 606 stores, for example, a voice recognition program, a voice synthesis program, and dictionary data, which are required for processing performed by the DSP 602. The synchronous DRAM 604 is a volatile memory for temporarily storing data processed by the DSP 602. The microprocessor 605 transfers the programs stored in the non-volatile MROM 606 to the DSP 602 and controls the DSP 602 to execute the programs.
The voice processing system 600 shown in FIG. 6 performs voice recognition as described below in steps S01 through S04.
Step S01: An analog voice signal input from an external device is converted into a digital signal by the A/D converter in the CODEC 601.
Step S02: The microprocessor 605 transfers the voice recognition program stored in the non-volatile MROM 606 to a program memory in the DSP 602. Alternatively, the microprocessor 605 transfers the voice recognition program, the dictionary data and the like stored in the non-volatile MROM 606 to the synchronous DRAM 604 and controls the DSP 602 to directly access the synchronous DRAM 604 and to read the voice recognition program, the dictionary data and the like transferred.
Step S03: The DSP 602 extracts a feature amount of the digital signal obtained in step S01 in accordance with the voice recognition program. For extracting the feature amount, the DSP 602 is controlled by the microprocessor 605 to read the acoustic model from the non-volatile MROM 603 while comparing the digital signal with the acoustic model stored in the non-volatile MROM 603. The obtained feature amount data is temporarily stored in the synchronous DRAM 604 via the bus 607.
Step S04: The DSP 602 identifies input voice from the feature amount data obtained in step S03. The DSP 602 reads the dictionary data stored in the non-volatile MROM 606 (or the dictionary data transferred to the synchronous DRAM 604) via the bus 607. Then, the DSP 602 reads the feature amount data temporarily stored in the synchronous DRAM 604 via the bus 607. The DSP 602 compares the dictionary data with the feature amount data read from the synchronous DRAM 604. The DSP 602 then temporarily stores intermediate data obtained by the comparison in the synchronous DRAM 604 via the bus 607. Since the bus 607 is occupied for storing the intermediate data in the synchronous DRAM 604, the comparison between the dictionary data and the subsequent portion of the feature amount data is interrupted while the intermediate data is being stored in the synchronous DRAM 604. In this manner, the entire feature amount data and the dictionary data are compared, so as to identify the input voice.
The voice processing system 600 performs voice synthesis in a manner similar to voice recognition as described below.
The voice synthesis program stored in the non-volatile MROM 606 is transferred to the program memory in the DSP 602 by an instruction from the microprocessor 605. In accordance with the voice synthesis program, the DSP 602 synthesizes voice from text data to be synthesized, and the D/A converter in the CODEC 601 converts the obtained digital voice signal into an analog signal. The analog signal is output through an external speaker.
The conventional voice processing system 600 shown in FIG. 6 typically uses the non-volatile MROMs 603 and 606 as non-volatile memories. An MROM already has information written therein when being produced, and the information cannot be rewritten by the user. An MROM is used for the reasons that (1) a voice recognition program, a voice synthesis program, dictionary data, an acoustic model and the like which are required for voice recognition or voice synthesis need not be rewritten, and (2) an MROM is inexpensive and cost-effective.
However, in order to improve the voice recognition accuracy, the acoustic model needs to be optimized by rewriting the data. The following two types of voice recognition systems, for example, use a rewritable non-volatile memory.
FIG. 7 is a block diagram illustrating a conventional voice recognition system 700 used for car navigation, which is disclosed in Japanese Laid-Open Publication No. 10-282987.
The voice recognition system 700 includes a microphone 701 for taking in voice, a dictionary switching section 703 for selecting a dictionary or switching one dictionary to another in accordance with dictionary switching information 702, a non-volatile ROM 704 storing a plurality of dictionary data units, a volatile RAM 705 for storing a dictionary data unit transferred from the non-volatile ROM 704, a voice analysis section 706 for performing pre-processing such as, for example, noise processing or voice analysis, a voice recognition section 707 for performing voice recognition, and an acoustic model section 708 storing an acoustic model to be read when the voice recognition section 707 performs voice recognition.
The voice recognition section 707 outputs a voice recognition result by a signal 709, and also feeds the voice recognition result back to the dictionary switching section 703 by a signal 710.
The non-volatile ROM 704 is a rewritable memory such as, for example, a flash memory. The plurality of dictionary data units stored in the non-volatile ROM 704 are transferred to the volatile RAM 705 when necessary. The voice recognition section 707 accesses the volatile RAM 705 storing the dictionary data unit transferred from the non-volatile ROM 704.
The voice processing system 700. stores the dictionary data units in the rewritable non-volatile ROM 704, and therefore improves the voice recognition accuracy in a car navigation system which needs to have a large vocabulary. Since the voice recognition section 707 accesses the volatile RAM 705 storing the dictionary data unit transferred thereto, high-speed data read is realized due to the characteristics of the RAM (random access memory) and thus the response speed of the voice processing system 700 is increased.
FIG. 8 is a block diagram illustrating a conventional voice processing system 800 used in a cellular phone, which is disclosed in Japanese Laid-Open Publication No. 11-345194.
The voice processing system 800 includes a CPU 801 for controlling elements of the voice processing system 800, a DSP 802 including a volatile RAM 803, and a non-volatile ROM 804 storing a voice CODEC, a program and the like. These elements are connected with each other as shown in FIG. 8 via a bus 805.
The non-volatile ROM 804 is a rewritable memory such as, for example, a flash memory. The program stored in the non-volatile ROM 804 is transferred to the volatile RAM 803 in the DSP 802 when necessary. The CPU 801 executes the program transferred to the volatile RAM 803, and thus the DSP 802 performs voice processing.
Since the voice processing system 800 uses the rewritable non-volatile ROM 804, the function performed by the DSP 802 can be changed simply by rewriting the voice processing program stored in the non-volatile ROM 804.
Using a rewritable non-volatile memory in a voice processing system as described above is effective, but is not suitable to certain types of voice processing systems which are required to perform real-time processing. The reason is because a rewritable non-volatile memory such as a flash memory has a disadvantage of the operating speed, especially the writing speed, being slower than that of a volatile memory.
In the voice processing system 700 shown in FIG. 7, in order to overcome the above-described problem, data which needs to be accessed at a high speed is first transferred from the non-volatile ROM 704 to the volatile RAM 705 and then the voice recognition section 707 directly accesses the volatile RAM 705. However, such a method disadvantageously requires complicated control of the voice processing system 700 and increases the number of elements required. The increase in the number of elements tends to prevent reduction in the size and weight of a mobile electronic device including the voice processing system.
In the voice processing system 800 shown in FIG. 8, in order to overcome the above-described problem, necessary programs including the dictionary data and the acoustic model are transferred from the non-volatile ROM 804 to the volatile RAM 803 in the DSP 802 and then the DSP 802 performs voice processing. Such a method allows the DSP 802 to perform voice processing once the necessary programs are transferred to the volatile RAM 803 in the DSP 802. The processing speed is not lowered because the CPU 801 does not occupy the bus 805. However, the volatile RAM 803 needs to have a relatively large memory capacity in order to store all the necessary programs. Such a large memory capacity also tends to prevent reduction in the size and weight of a mobile electronic device including the voice processing system.
Conventional mobile electronic devices including cellular phones adopt a microprocessor or a DSP having a relatively low processing capability. In order to perform real-time voice processing in such a mobile electronic device, the DSP needs to be controlled by a CPU so as to efficiently access a non-volatile memory for storing a program used for performing voice processing and a volatile memory for storing intermediate data obtained by voice processing. However, a voice processing system having a conventional bus structure does not allow the DSP to write the intermediate data to the volatile memory while accessing the dictionary data stored in the non-volatile memory.
Today, mobile electronic devices, which have been conventionally used mainly for cellular phone conversation, are used in a wider range of applications requiring a higher level of security such as, for example, network shopping and online banking. Accordingly, a system usable in such a wider range of applications is in demand. A mobile electronic device, having a voice recognition system for managing personal identification information as security means for preventing the mobile electronic device from being illegally used by a third party, instead of a simple voice dialing function mounted on an existing cellular phone, is demanded.
A signal processing system according to the present invention includes an A/D conversion section for converting an analog signal input from an external device into a digital signal; a digital signal processing section for processing the digital signal; a D/A conversion section for converting the digital signal processed by the digital signal processing section into an analog signal; a control section for controlling the A/D conversion section, the digital signal processing section, and the D/A conversion section; and a memory section including a first program memory area for storing a program for processing the digital signal and a first data memory area. The digital signal processing section includes a second program memory area connected, via a first bus, to the first program memory area, and a second data memory area connected to the first data memory area via a second bus. The control section transfers the program stored in the first program memory area to the second program memory area via the first bus, and executes the program thus stored in the second program memory area, so as to control the processing of the digital signal performed by the digital signal processing section. The control section stores the digital signal processed by the digital signal processing section in the second data memory area, transfers at least a part of the digital signal stored in the second data memory area to the first data memory area via the second bus, and transfers the digital signal stored in the first data memory area to the second data memory area via the second bus, so as to control the processing of the digital signal performed by the digital signal processing section.
In one embodiment of the invention, the analog signal input from the external device is a voice signal.
In one embodiment of the invention, the first program memory area further stores data for comparison. The second data memory area is connected to the first program memory area via a third bus. The control section controls the digital signal processing section to read the data for comparison stored in the first program memory area and to compare the digital signal with the data for comparison.
In one embodiment of the invention, the first program memory area is a rewritable non-volatile memory, and the first data memory area is a high-speed writable memory.
In one embodiment of the invention, the high-speed writable memory is a volatile memory.
In one embodiment of the invention, the signal processing system further includes a third data memory area connected to the first program memory area, wherein the control section stores external information received by a communication device in the third data memory area and transfers the external information stored in the third data memory area to the first program memory area.
In one embodiment of the invention, the first program memory area includes a first non-volatile memory cell unit including at least one non-volatile memory cell, and a second non-volatile memory cell unit including at least one non-volatile memory cell. The signal processing system further includes a comparison section for comparing the digital signal and data stored in each of the at least one non-volatile memory cell in the first non-volatile memory cell unit, and a lock section for selectively placing the second non-volatile memory cell unit into a state accessible by the control section or a state inaccessible by the control section. The first non-volatile memory cell unit is in the state accessible by the control section regardless of a state of the signal processing system. The second non-volatile memory cell unit is in the state inaccessible by the control section when the signal processing system is turned on or reset. When the digital signal matches the data stored in any of the at least one non-volatile memory cell in the first non-volatile memory cell unit, the control section controls the lock section to change the state inaccessible by the control section of the second non-volatile memory cell unit into the state accessible by the control section.
In one embodiment of the invention, the data stored in each of the at least one non-volatile memory cell in the first non-volatile memory cell unit is voice feature amount data of an individual.
In one embodiment of the invention, when the digital signal matches the data stored in any of the at least one non-volatile memory cell in the first non-volatile memory cell unit, the control section controls the lock section to change the state inaccessible by the control section of at least one non-volatile memory cell in the second non-volatile memory cell unit, which corresponds to the non-volatile memory cell in the first non-volatile memory cell unit storing the data matching the digital signal, into the state accessible by the control section.
In one embodiment of the invention, the first non-volatile memory cell unit includes a one-time programmable memory.
In one embodiment of the invention, the first program memory area includes a first non-volatile memory cell unit including at least one non-volatile memory cell, and a second non-volatile memory cell unit including at least one non-volatile memory cell. The signal processing system further includes a comparison section for comparing the digital signal and data stored in each of the at least one non-volatile memory cell in the first non-volatile memory cell unit, a lock section for selectively placing each of the first non-volatile memory cell unit and the second non-volatile memory cell unit into a state accessible by the control section or a state inaccessible by the control section, and a counting section for counting a number of times at which the digital signal does not match the data stored in any of the at least one non-volatile memory cell in the first non-volatile memory cell unit. The first non-volatile memory cell unit is in the state accessible by the control section when the signal processing system is turned on or reset. The second non-volatile memory cell unit is in the state inaccessible by the control section when the signal processing system is turned on or reset. When the number of times counted by the counting section reaches a predetermined value, the control section controls the lock section to change the state accessible by the control section of the first non-volatile memory cell unit into the state inaccessible by the control section and to maintain the second non-volatile memory cell unit in the state inaccessible by the control section.
A signal processing system according to the present invention includes an A/D conversion section for converting an analog signal input from an external device into a digital signal; a digital signal processing section for processing the digital signal; a D/A conversion section for converting the digital signal processed by the digital signal processing section into an analog signal; and a control section for controlling the A/D conversion section, the digital signal processing section, and the D/A conversion section. The digital signal processing section includes a second program memory area connected, via a first bus, to a first program memory area storing a program for processing the digital signal, and a second data memory area connected to a first data memory area via a second bus. Due to such a structure, the control section controls the elements in the signal processing system so that the first bus is used to transfer the program stored in the first program memory area to the second program memory area, while the second bus is used to write the digital signal processed by the data signal processing section to the first program memory area and/or to read the digital signal stored in the first program memory area. As a result, the real-time signal processing can be realized without increasing the number of elements of the signal processing system.
Utilizing the non-volatility of the first program memory area, an improved level of security can be provided. Especially in the case where data read from memory cells other than a specific memory cell is prevented when the signal processing system is turned on or reset, the signal processing system is not usable by a third party other than the registered individual(s).
In the case where a writable non-volatile memory is used, information downloaded by a communication device such as a cellular phone, can be written and stored in the first data memory area at a high speed while realizing the high level of security. A voice recognition application can be customized in conformity to the user""s preference. Thus, signal processing systems, for example, voice processing systems usable for a variety of applications can be provided.
Thus, the invention described herein makes possible the advantages of providing (1) a signal processing system having a bus structure for realizing real-time signal processing without increasing the number of elements of the signal processing system and (2) a signal processing system having a high level security function.
These and other advantages of the present invention will become apparent to those skilled in the art upon reading and understanding the following detailed description with reference to the accompanying figures.